Performance and Bus Transfer Influences
نویسندگان
چکیده
Introduction Real-time systems which offer guaranteed response times need to schedule all resources, including CPU cycles, caches and bandwidths of buses. In this review we present a methodology how to schedule real-time requests for SCSI bus based IO and show measurements about the influences between SCSI, ATM and CPU traffic on the PCI bus and the local memory bus. We propose a slowdown factor Fsd to characterise applications for their sensitivity to bus interference which is used in CPU scheduling analysis. This work is embedded in the DROPS project [1] that uses simple and powerful standard hardware as platform; it tempts to organise the coexistence of real-time and time-sharing applications by providing managers for all resources. These managers enforce reservations for real-time applications and leave the rest to the time-sharing applications. We mainly focus on bus bandwidth as resource, whereas the conflicting points in a standard PCI-based system are (I) the SCSI bus, (II) the PCI bus, and (III) the memory bus. Experimental work showed that by use of our SCSI access method we can achieve guaranteed SCSI bandwidth of 86% of the maximum bandwidth. The slowdown factor for the application with worst-case (i.e., highest) memory bandwidth is around 2.5, for applications such as Quicksort it is 1.22, and 1.08 for DES. For measurement, we generate maximum SCSI load for a predictable access method for SCSI bus systems. Next, we induce PCI load by a master capable PCI card that actively transfers data into the host memory, and measure maximum memory bus read and write bandwidth. Therefore, we use an FORE PCA200E card, since the on-board i960-CPU is freely programmable. Hereafter, we combine PCI load with SCSI bus to see impacts on the PCI bus, and last but not least, PCI load and host memory transfer. Finally, we determine the worst-case slowdown factor for processes running on the processor. For that purpose, we measure a worstcase (i.e., highest memory bandwidth) process and its slowdown.
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تاریخ انتشار 1998